The Potential and Challenges of Two- Dimensional Materials in Sub-5 nm CMOS Devices

Authors

  • Tingan Wang

DOI:

https://doi.org/10.61173/cmbky266

Keywords:

2D materials, CMOS, sub-5 nm node

Abstract

The relentless scaling of CMOS transistors below 5 nm has pushed silicon to its fundamental limits, resulting in severe short-channel effects, degraded carrier mobility, and excessive leakage. Two-dimensional (2D) materials—graphene, molybdenum disulfide (MoS₂), tungsten disulfide (WS₂), and black phosphorus (BP)—have emerged as attractive alternatives to silicon channel materials due to their atomically thin bodies, favorable carrier mobility, and excellent electrostatic controllability. In this paper, we carefully review the capability of these 2D materials to serve as channel materials for sub-5 nm CMOS devices in terms of transport characteristics, bandgap, scalability, and integration. We critically compare the distinct advantages and associated challenges of each material, including contact resistance, fabrication scalability, environmental stability, and gate dielectric compatibility. Our analysis concludes that although 2D materials offer clear promise for extending Moore’s Law beyond the silicon era, extensive research and engineering are still required to address the remaining issues before they can be feasibly adopted in future CMOS technology.

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Published

2026-02-28