<b>Design and Optimization of VLSI</b> <b>Architectures for Artificial Neural</b> <b>Networks: Innovations, Challenges, and</b> <b>Future Directions</b>
DOI:
https://doi.org/10.61173/3x8zeg14Keywords:
VLSI, artificial neural network, perceptronAbstract
With the rapid development of artificial technology, artificial neural networks (ANN) have come into people’s vision. Artificial neural network is a computing system that mimics the workings of the human brain. It is widely used in information recognition, natural language processing and predictive analysis. It uses electronic components to form nodes. These nodes are similar to human neurons: each node is connected with multiple nodes in adjacent levels with different weights. Very large scale integrated circuit (VLSI) technology plays a crucial role in optimizing the hardware implementation of ANN. This paper introduces the design principle of VLSI architecture for ANN. Using a simple ANN model- Perceptron as an example, the optimization design of tree adder and accumulator is discussed. In addition, several advanced design techniques and hardware-specific optimization strategies of VLSI technology in practical ANN applications will be discussed. Lastly, this paper summarizes the challenges that VLSI may face in the development of neural networks.
References
[1] Chen, Y., Emer, J., & Sze, V. Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks. IEEE Micro, 2017, 37(1): 14-23.
[2] Wojcicki, T., & Iniewski, K. (Eds.). VLSI: Circuits for emerging applications. CRC Press, Taylor & Francis Group, 2015. Retrieved from Gallant, S. I. Perceptron-based learning algorithms. IEEE Transactions on Neural Networks, 1990, 1(2): 179-191.
[3] Zhu, X., Zhang, Y., Zhao, Z., & Zuo, J. Radio frequency sensing based environmental monitoring technology. In Fourth International Workshop on Pattern Recognition, SPIE, 2019, Vol. 11198: 187-191. Dean&Francis ISSN 2959-6157
[4] Vai, M. M. VLSI design. CRC Press, 2017.
[5] Ande, J. R. P. K., & Khair, M. A. High-Performance VLSI Architectures for Artificial Intelligence and Machine Learning Applications. International Journal of Reciprocal Symmetry and Theoretical Physics, 2019, 6(1): 20-30.
[6] Zhu, X., Zhao, Z., Wei, X., Wang, X., & Zuo, J. Action recognition method based on wavelet transform and neural network in wireless network. In Proceedings of the 2021 5th International Conference on Digital Signal Processing, 2021: 60- 65.
[7] Wang, R., Zhu, J., Wang, S., Wang, T., Huang, J., & Zhu, X. Multi-modal emotion recognition using tensor decomposition fusion and self-supervised multi-tasking. International Journal of Multimedia Information Retrieval, 2024, 13(4): 39.
[8] Amuru, D., Zahra, A., Vudumula, H. V., Cherupally, P. K., Gurram, S. R., Ahmad, A., & Abbas, Z. AI/ML algorithms and applications in VLSI design and technology. Integration, 2023, 93: 102048.
[9] Kaur, R., Asad, A., & Mohammadi, F. A Comprehensive Review of Processing-in-Memory Architectures for Deep Neural Networks. Computers, 2024, 13(7): 174.
[10] Jeyarohini, R., Sathya, R., Sellapaandi, S. P., Kavitha, P., Ramesh, D. R., & Mukherjee, A. An Examination of Machine Learning Techniques for Automating and Optimizing VLSI Design. In 2024 International Conference on Science Technology Engineering and Management (ICSTEM), IEEE, 2024: 1-6.
Downloads
Published
Issue
Section
License
Copyright (c) 2025 by the authors.
This work is licensed under a Creative Commons Attribution 4.0 International License.
