LIANG, Jialun. Design and Optimization of Hardware Accelerators for Convolutional Neural Networks. Science and Technology of Engineering, Chemistry and Environmental Protection, [S. l.], v. 2, n. 6, p. 7542, 2024. DOI: 10.61173/yj3aad19. Disponível em: https://stecep.deanfrancis.press/article/view/1329. Acesso em: 4 nov. 2026.