XIE, Qilin; ZHANG, Jingyu. A Highly-Parallel AI Accelerator Architecture for Convolution and Activation, Implemented in Verilog. Science and Technology of Engineering, Chemistry and Environmental Protection, [S. l.], v. 4, n. 1, p. 14762, 2026. DOI: 10.61173/fmwnqv14. Disponível em: https://stecep.deanfrancis.press/article/view/299. Acesso em: 4 nov. 2026.